CMOS logic is approaching the limits of front end of the line (FEOL), middle of the line (MOL) and back end of line (BEOL) area scaling. Area scaling is desirable not only because of the increased device density but also because area scaling reduces MOL/BEOL parasitic resistance by reducing the run length of traces in a given circuit. However, quantum transport simulations of metal wires indicate that even under ideal conditions, resistivities of traces may increase super-linearly with the reduction of the cross section at advanced nodes (>5 nm). Furthermore, if MOL/BEOL scaling stops due to the super-linear increase in line resistivities, any advantages afforded by FEOL scaling may be reduced or nullified, because the areal density of devices will be artificially reduced in order to satisfy the place and route constraints imposed by the non-scaled MOL/BEOL.
In addition to the fundamental resistivity limits facing MOL/BEOL scaling, there are fundamental limits to contacted poly pitch (CPP) scaling of the FEOL in the direction of transport. For example, there is a fundamental limit to the contact resistivities at the source/drain and electrostatic control of the gates. Contact resistivity limits the minimum area used to keep the contact resistance, and thus, to keep the parasitic resistance small enough so that the total impedance of the circuit is dominated by the state of the channel. The minimum gate length used to impose electrostatic control of the channel is largely a function of equivalent oxide thickness (EOT) of the gate stack, geometry of the channel and gate, and the gate material. Even under ideal conditions (e.g., smallest possible EOT, gate all around nanowire, and indirect material), there may be some minimum gate length which ultimately limits CPP scaling. These are just a few examples of the factors that may limit FEOL area scaling.
The above information disclosed in this Background section is for enhancement of understanding of the background of the invention, and therefore, it may contain information that does not constitute prior art.